Contract Hardware Engineer Mid.

Hardware Engineer

Cedar Rapids, IA (Onsite role)

12+ Months Contract

 

NOTE: Due to nature of the project, U.S. Citizenship and the ability to obtain a security clearance is required.

 

Experience range - 6-15 years

• Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration

• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow

• Contribute to engineering estimates for new program pursuits.

• May provide technical leadership for project design teams by breaking down work, planning activities, and reporting status

 

Must have Skills:

• RTL coding and simulation in VHDL/Veriog

• Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure

• Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synplify, Quartus, Vivado, or other FPGA-specific tools)

• Git, Subversion

• Experience with Unix, scripting, C/C++, and/or Perl

Preferred Skills:

• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)

• ASIC / FPGA lab validation with advanced lab equipment

• Design for Test (DFT) and manufacturability issues

• Experience with Unix, scripting, C/C++, and/or Perl